Locally clocked microprocessor
S.J. Muscato, Alexander Albicki · 2002
A 2- mu m CMOS locally clocked sequential microprocessor designed for a self-timed environment is described. The processor's synchronization is based on a pulse that runs through the system. The pulse is channeled through a delay block that simulates the processing time of the instruction to be executed. Since it accrues the average delay, rather than the longest delay of the instructions executed, this processor is thought to have better throughput than one with a globally distributed clock. The processor implements RISC concepts into its architecture and organization and is used for educational purposes.>