Re-synthesis in technology mapping for heterogeneous FPGAs
Maurice Kilavuka Inuani, Jonathan Saul · 2002
Field programmable gate arrays containing more than one size of lookup-table occupy a large and growing portion of the market, but technology mapping for these architectures has hardly been considered. New algorithms have been developed for decomposition, covering and restructuring targeted at these architectures. Benchmark results show that the new method produces circuits which are on average 15% smaller than the best previous approach we know of.