Parallel algorithms and VLSI architectures for stack filtering using Fibonacci p-codes
David Z. Gevorkian, Karen Egiazarian, Sos С. Agaian, Jaakko T. Astola, Olli Vainio · IEEE Transactions on Signal Processing · 1995
A parallel decompositional algorithm and VLSI architecture is proposed for computation of the output of a stack filter over a single window of input samples using Fibonacci p-codes. For a subclass of positive Boolean functions, a more efficient parallel algorithm and VLSI architecture for running stack filtering is also presented. The area-time complexities of the proposed designs are estimated.>