Saving Register-File Leakage Energy by Register-usage Exploiting
Wann‐Yun Shieh, Chien-Chen Chen · 2008
Applying dynamic voltage scaling technique to design a low-power register file plays an important role in modern embedded-processor design. In this paper, we propose a compiler-aided approach to find out in a program which and when the registers would not be used, and to turn these unused registers into low power mode through voltagescaling controls. The proposed approach can be partitioned into the software mechanism and the hardware logic. For the software mechanism, we exploit register-usage and schedule voltage-scaling controls at selected points in a program. For the hardware logic, we propose a “connected ” recorder to store power states for multiple registers such that sequential voltage-scaling controls can be performed in a batch, instead of one powerstate update just for only one register. Simulation results show that the proposed approach not only improves total register file energy consumption by 21%-28 % through leakage energy saving, but also provides well trade-offs in the term of energy-delay product.