On the verification of synthesized designs using automatically generated transformational witnesses
Elena Teica, Ramaswamy Radhakrishnan, Ranga R. Vemuri · Design, Automation, and Test in Europe · 2001
Summary form only given. The authors present a new methodology for verifying the synthesized designs, and for debugging the software implementation of high-level synthesis algorithms. The methodology is based on a a set of 7 RTL transformations which are able to emulate the effect of many scheduling and resource allocation algorithms.