An Application of 16-Valued Logic to Design of Reconfigurable Logic Arrays
Tsutomu Sasao · Proceedings/Proceedings - International Symposium on Multiple-Valued Logic · 2007
This paper presents a method to implement a reconfigurable logic array by using FPGA. 16-valued logic is introduced to design circuits with 2-valued 4-input LUTs. Symmetric functions and adders can be efficiently represented, as well as benchmark functions. Comparisons with 2-valued expressions and 4-valued expressions are done. Both sum-of-products expressions and EXOR sum-of-products expressions of 16-valued logic significantly reduces needed FPGA resources.