A 23.8 MHz 73-DB attentuation recursive digital filter IC
L. Liu, Rajeev Jain, T. Yoshino · 1992
A ninth-order recursive digital filter with a 47.6MHz clock rate/ 23.8 MHz sample rate has been designed and fabricated on a single chip using a 1.2pm CMOS technology. The filter achieves an attenuation of 73dB with a transition width of only 5% of the sample rate. The chip demonstrates architecture and circuit design techniques for sharp roll-off required in high date-rate communication systems.