SIMD extension to VLIW multicluster processors for embedded applications
Domenico Barretta, William Fornaciari, Mostafa Sami, Danilo Pietro Pau · 2003
We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may increase significantly when the application is compiled for the proposed architecture.