Design of neural network systems from custom analog VLSI chips
Yuanda Wang, F.M.A. Salam · 2002
Custom analog CMOS VLSI components have been designed to allow the construction of neural networks with arbitrary architectures. A wide-range, all-enhancement-mode, MOS analog four-quadrant multiplier has been employed to implement the scalar vector product of the vector of neuron outputs and the vector of the corresponding weights. A nonlinear MOSFET floating element is used to model nonlinear conductive elements; this extends the modeling of the synaptic weights to nonlinear elements. A neuron is realized by a simple CMOS operational amplifier which is compatible with the I/O of the analog multiplier. The neural system can be expanded modularly to large dimensions. SPICE simulations demonstrate the functionality of the all-MOS feedback neural nets using a two-neuron prototype as an example.>