A high performance floating-point special function unit using constrained piecewise quadratic approximation
Davide De, Nicola Petra, A.G.M. Strollo · 2008
A special function unit, able to compute square root, reciprocal square root, logarithm and exponential functions is presented in this paper. The system supports single precision IEEE-754 floating-point standard and uses a novel constrained piecewise quadratic interpolation technique to approximate the implemented functions. The proposed approach allows to reduce look-up table size of 40% with respect to previously proposed techniques. The SFU has been implemented in a test chip in 0.18 mum CMOS. A maximum clock frequency of 420 MHz and a power dissipation of 160 mW@420 MHz have been measured.