Computer Architecture in the Many-Core Era
Bill Dally · Proceedings, IEEE International Conference on Computer Design/Proceedings - IEEE International Conference on Computer Design · 2006
We are rapidly moving into an era when microprocessors (and SoCs) will have 10s of processors on a single die. In this era, we are less concerned with the architecture of individual processors and more concerned with how they are tied together. In particular we are concerned with how on-chip memory is organized to optimize use of the limited off-chip bandwidth and how long off-chip latency is hidden from computation. This talk will discuss the challenges of many-core architecture and how the memory organization and management techniques of stream processing can be applied to solve them.