Implementation and prototyping of a complex multi-project system-on-a-chip
Chun-Ming Huang, Chien‐Ming Wu, Chih-Chyau Yang, Wei-De Chien, Shih‐Lun Chen, Chi‐Shi Chen, Jiann-Jenn Wang, Chin‐Long Wey · 2009
A silicon prototyping methodology is presented for Multi-Project System-on-a-Chip (MP-SoC) implementation. A multi-projects platform was created for integrating heterogeneous SoC projects into a single chip. The total silicon prototyping cost of these projects can be greatly reduced by sharing a common platform. To demonstrate the effectiveness of the proposed methodology, a MP-SoC chip was implemented with eleven SoC projects sharing the common platform. The total silicon area is about 37.97 mm2in the TSMC 0.13 um CMOS generic logic process technology. Compared with the total chip area 129.39 mm2by implementing these projects separately, the results show that there are 91.42 mm2silicon areas reduced by the MP-SoC platform. In order to verify MP-SoC through silicon prototyping, a system modeling and hardware/ software co-design virtual platform were implemented. A configurable SoC prototyping system, namely CONCORD, is also created as a verification platform for emulating the hardware of MP-SoC before chip being taped out. The CONCORD system provides higher connection flexibility, modularization, and architecture consistence than conventional FPGA systems.