Hardware/Software co-design of a key point detector on FPGA
H. Djakou Chati, Felix Mühlbauer, Torsten Ingo Braun, Christophe Bobda, Karsten Berns · 2007
The design and implementing of a key point detector on embedded reconfigurable hardware is investigated. The major challenges are efficient hardware/software partitioning of the key point detector algorithm, data flow management as well as efficient use of memory, bus and processor. We present a modular and manual hardware/software co-design, with its implementation on a Xilinx XUP-Virtex II Pro board co-design to solve these issues.