Low-complexity parallel-structure symbol-by-symbol detection for ISI channels
J.A. Erfanian, S. Pasupathy · 2003
The problem of practical realization of the optimal fixed-delay symbol-by-symbol detection algorithm is investigated. A new structure is developed which is fully parallel with a speedup factor of 2/sup D+1/ (compared to serial implementation), where D is the delay constraint. Through systematic reformulations of the algorithm, a number of simplifications are performed that avoid the complex and slow computations of exponentials and a large number of multiplications, all at the expense of a small lookup table and a number of simple operations involving additions, comparisons, and table lookups. A number of approximations are applied to this simplified parallel symbol (SPS) detector which lead to the derivation of suboptimal detectors. An interesting suboptimal detector so derived is identical in computations to the Viterbi detector. A comparison of the SPS detector and Viterbi detector shows that the former has a slightly better performance at low values of signal-to-noise ratio (SNR) and the latter has a lower complexity at higher values of SNR; otherwise, the two detectors are comparable in performance and complexity.>