Model of a Shared Memory Multiprocessor
Angel Vassilev Nikolov · 2009
We develop an analytical model of multiprocessor with private caches and shared memory and obtain the steady-state probabilities of the system. Behavior in equilibrium can be studied and analyzed. We show that results can be applied to determine the output parameters for both blocking and non-blocking caches. Key words: Invalidate cache-coherence protocol, queuing system, discrete transform 1.