Single Precision Floating Point Fft
Ujwal S. Ghate · IJCA Proceedings on National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2012) · 2012
this paper the design and implementation of 32 bit IEEE 754 single precision floating point FFT architecture is proposed. Usually for FFT calculation the sequential circuits use for mantissa adjustment which is somewhat tedious job So, new approach is define for calculating FFT in pure combinational circuits form. The simulation result are compare with the quartus II and Active HDL software also it is cross verified with Matlab . The algorithm is implemented on FPGA.