An Integer Wavelet Transform Implemented on a Parallel TI TMS320C40 Platform
Francis Decroos, Peter Schelkens, Gauthier Lafruit, Jan P. Cornelis, Francky Catthoor · 1999
Abstract – We present the implementation of the lifting scheme- an integer wavelet transform- on a parallel TI TMS320C40-platform. While classically, the optimization is mostly driven by arithmetic optimizations, our selected methodology uses power, speed and memory size figures to explore the design space. Among several implementation approaches, the classical row-column approach is selected, based on the memory constraints imposed by the C40 implementation platform. The use of an in-place wavelet organization eliminates the need for intermediate buffers. To minimize data transfer times, the DMA coprocessor is used to perform data transfers in parallel with the wavelet processing. The obtained implementation, fully written in parallel C-code, uses one processor to perform the wavelet decomposition/reconstruction of the luminance (Y) frames (256 by 256) and one for the horizontally subsampled chrominance (U and V) frames. Frame rates of 19.9 fps and 13.2 fps were achieved for a one level, respectively a three level 9/7 Daubechies wavelet transform. I.