Wideband speech codec at 64kb/s using an advanced digital signal processor "DSSP-1"
Y. Kanayama, Satoshi Ono · 2005
A 7 kHz-band speech CODEC using an advanced digital signal processor is developed. The coding algorithm for this CODEC requires greater processing power due to its complexity and high sampling rate. A high-performance digital signal processor VLSI, "DSSP-1", is applied to this CODEC. Arithmetic word-length, arithmetic operation speed, and memory capacity required for this CODEC is evaluated. DSSP-1 can satisfy these requirements; this CODEC has been built with two DSSP-1 chips and several memory chips.