Clock grouping
Wen-Chang Fang, Sandeep K. Gupta · 1994
Article Free Access Share on Clock grouping: a low cost DFT methodology for delay testing Authors: Wen-Chang Fang Electrical Engineering Systems, University of Southern California, Los Angeles CA Electrical Engineering Systems, University of Southern California, Los Angeles CAView Profile , Sandeep K. Gupta Electrical Engineering Systems, University of Southern California, Los Angeles CA Electrical Engineering Systems, University of Southern California, Los Angeles CAView Profile Authors Info & Claims DAC '94: Proceedings of the 31st annual Design Automation ConferenceJune 1994 Pages 94–99https://doi.org/10.1145/196244.196291Published:06 June 1994Publication History 10citation181DownloadsMetricsTotal Citations10Total Downloads181Last 12 Months2Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF