Domain specific reconfigurable fabric targeting Viterbi algorithm
Cheng Zhan, Sami Khawam, Tughrul Arslan · 2005
This work presents a novel embedded reconfigurable fabric targeting efficient implementation of the Viterbi decoder within a system-on-chip device. The proposed reconfigurable fabric can support constraint lengths ranging from 3 to 9, and code rates in the range 1/2-1/3.Our results demonstrate that this novel architecture has superior throughput and power consumption characteristics when compared to generic DSPs and FPGAs respectively.