A synthesis approach to design optimally fault tolerant network architecture
Abhijit Sengupta, Prashant D. Joshi, S. Bandyopadhyay · IEEE Transactions on Computers · 1991
A synthesis approach to the design of a class of regular networks which provide optimal fault tolerance and are of small diameter is presented. The approach makes it possible to design a regular network in the form of a directed graph when the number of nodes n and the number of connections per node d are given, for any n and d. The designed graph will have node connectivity d and a diameter proportional to (og/sub d/ n).>