Testing CPU based boards for functionality using bus cycle signature system
S.R. Sabapathi · 2002
This paper presents a new and novel technique of employing a Bus Cycle Signature System in cost effective testing and diagnostics of CPU based boards. The system controls the board under test using a single reset line. A CPU specific hardware interface unit generates strobe signals during active bus cycles. During this time, the test nodes are strobed and the resultant bit stream is then compressed into a 16-bit signature word. The fault detection is achieved by comparing bus cycle signatures of the known good board to that of a board under test. The major plus point of the system is its ability to detect faults down to node level with a fault coverage of over 95% in the CPU kernel, without having to write complex time consuming test programs.