Efficient parametric fault detection in switched-capacitor filters
Antonio Petraglia, J.M. Canive, Mariane R. Petraglia · IEEE Design & Test of Computers · 2006
Advances in technology and IC design techniques have allowed for sophisticated analog and digital functions in a single chip, in which switched-capacitor (SC) networks perform fundamental operations such as filtering and A/D and D/A conversion. As a result, considerable effort has gone into improving test coverage and testable circuit design in general and SC networks in particular. This article presents an alternative SC-filter-testing methodology, which not only accurately detects but also locates parametric faults, using little additional circuitry. Based on structurally all-pass building blocks, the proposed technique fits into the DFT category. It uses considerably less additional circuitry for testing than other approaches because the testing procedure consists of forming notch filters out of existing second-order all-pass sections. Moreover, it does not require reconfiguration of the circuit under test, making it suitable for online testing. The testing scheme also belongs to the multifrequency analysis class, but it requires neither optimization nor sensitivity computations because the filter transfer function's synthesis procedure naturally reveals the optimum test frequencies and nodes. The scheme is readily extendable to other discrete- or continuous-time structures based on all-pass filters.