A modular pipelined macro-block for high-speed digital filtering applications
Frank K. Gürkaynak, Yusuf Leblebici · 2003
A programmable, fully pipelined macro-block (Aries), that can be used as a modular convolution engine to design digital FIR filters of any size with a minimum clock cycle of 20 ns is presented. The proposed module is very compact and occupies an active silicon area of less than 1.5 mm/sup 2/ in a conventional 0.8 /spl mu/m digital CMOS technology, allowing a large number of Aries macro-blocks to be easily embedded in a larger design to realize digital filters of any dimensions.