Analysis of Resistive Bridging Defects in a Synchronizer
Hyoung-Kook Kim, Wen-Ben Jone, Laung‐Terng Wang, Shianling Wu · 2009
This paper presents fault modeling and analysis for resistive bridging defects in a synchronizer constructed with two D flip-flops. Bridging defects are exhaustively injected into any two nodes of the synchronizer to find all possible faults that might occur in the synchronizer, and HSPICE is used to perform circuit analysis.