High-Level Synthesis of Recoverable Microarchitectures
Seong Yong Ohm, Douglas M. Blough, Fadi Kurdahi · 1996
Two algorithms that combine the operations of scheduling and recovery point insertion for high-level synthesis of recoverable microarchitectures are presented. The first uses a prioritized cost function in which functional unit cost is minimized first and register cost second. The second algorithm minimizes a weighted sum of functional unit and register costs. Both algorithms are optimal according to their respective cost functions and require less than 10 minutes of CPU time on widely-used high-level synthesis benchmarks. The best previous result reported several hours of CPU time for some of the same benchmarks. 1 Introduction In this paper, we address the high-level synthesis of faulttolerant digital systems. Fault tolerance is required in many applications, including (1) those where repair is difficult or impossible, e.g. systems used in space, underground, or underwater, (2) safety-critical applications such as fly-bywire aircraft and nuclear reactor control systems, and (3) app...