Programmable interleaver design for analog iterative decoders
Vincent Gaudet, R.J. Gaudet, P. Glenn Gulak · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2002
Several programmable analog interleaver architectures for iterative decoders are proposed. The architectures are evaluated in terms of transistor count, path resistance, path capacitance, and programming logic. Interleavers built out of networks consisting of three layers of small crossbars are often deemed the best, reducing both switch count and capacitance by over 70% for an interleaver size of 100, as opposed to full crossbars, while maintaining full programmability.