SMART (strategic memory allocation for real-time) cache design using the MIPS R3000
David B. Kirk, J.K. Strosnider · 1990
SMART, a technique for providing predictable cache performance for real-time systems with priority-based preemptive scheduling, is presented. The technique is implemented in a R3000 cache design. The value density acceleration (VDA) cache allocation algorithm is also introduced, and shown to be suitable for run-time cache allocation.>