Threading a multiple scan paths in a VLSI circuit
S. Bhawmick, Manpreet Khaira, P.P. Mishra, Arindam Das, Ayush Dasgupta, P. Palchaudhury · 2003
The problem of configurating multiple scan paths in a VLSI circuit is discussed. Based on the analysis of the circuit, certain specific subcircuits are identified and a scan path is next configured for testing each such subcircuit. Rather than the algorithmic approach, a knowledge-based system strategy has been adopted to automate the approach taken by a human designer to tackle the problem.>