Improved test pattern generation for sequential circuits using implicit enumeration
E. Auth, J. Kastner · 2003
The authors describe Essential, an efficient deterministic test pattern generation algorithm for synchronous sequential circuits. Its conceptual strategy is based on the combination of reverse time processing over time frames and forward processing within time frames. In addition to fully exploiting the beneficial methods that have successfully been used for combinational circuits by the ATG system SOCRATES, the proposed test generation approach comprises a new circuit model and several new techniques leading to a significant improvement and acceleration of the deterministic test pattern generation process.>