Low Cost Test of High Bandwidth Embedded Memories
Kevin Gorman, Darren Anand, Gary Pomichter, William Corbin · 2006
This work presents architectures and methods necessary for providing efficient and thorough test of high bandwidth embedded memories using low speed ATE. Details are also provided on the techniques used to minimize test related silicon area and test time requirements. This combination of flexible at-speed test with minimal circuitry and ATE requirements, and reduced time under test, leads to lower cost production of embedded memories