Graceful degradation of an adaptive beamforming processor
Gary M. Heiligman, Robert J. Purdy · IEEE Transactions on Aerospace and Electronic Systems · 1992
The phase and amplitude weights of each element in an adaptive, digitally beamformed array antenna can be calculated by a systolic parallel processor. The authors propose that the entire weight calculation (both QR decomposition, previously discussed by W.M. Gentleman and H.T. Kung (1981), and the back-substitutions, which are presented for the first time) be performed in a triangular array of processors. This has the highly desirable property of graceful degradation: the loss of one or more component processors does not cause the computed weights to degrade catastrophically. The loss of a processor in the systolic array merely reduces the number of available degrees of freedom. Moreover, the processing array does not need to be globally reconfigured; the functions of all the remaining processors are unaffected and their interconnections are undisturbed. The authors describe the processing flow in the systolic array, show how its degradation is inherently graceful, and present a realistic example of graceful degradation.>