TERNARY AND QUATERNARY LATTICE DIAGRAMS FOR SYNTHESIS LINEARLY-INDEPENDENT LOGIC, MULTIPLE-VALUED LOGIC, AND ANALOG
Marek A. Perkowski, Edmund Pierzchala, Rolf Drechsler · 1997
Ternary and Quaternary Lattice Diagrams are introduced that can find applications to submicron design, and designing new fine-grain digital, analog and mixed FPGAs. They expand the ideas of Lattice diagrams [6, 111 and Linearly Independent (LI) Logic [5, 7, 8, 9, 10, 12, 17, 181. In a regular layout, every cell is connected to 4, 6 or 8 neighbors and to a number of vertical, horizontal and diagonal buses. Various lattices and algorithms for their creation are presented.