Design of a dynamic reconfigurable multi-grained hardware architecture with adaptive runtime routing
Alexander J. Thomas · 2005
Currently the HoneyComb architecture is already implemented in VHDL and ready for tests. At the moment, testing, synthesis and layouting work of the architecture on TSMC 90 nm standard cell technology is ongoing. For the presentation I am planning to introduce the HoneyComb architecture in detail and giving an outlook on planned software tools as well as first application results. Furthermore the definition of the HoneyComb-language will be introduced which is defined for abstract programming purposes to ease the usability of the architecture.