An embedded process monitor test chip architecture
Sachin Idgunji, Vikas Chandra, Cezary Pietrzyk, Imran Akhtar Iqbal, Rob Aitken, Greg Yeric · 2010
We present a test chip architecture which embeds a thorough set of process characterization ring oscillators into a synthesized digital circuit, such as a processor core. We discuss the motivation, implementation, and results from sub-40nm technology silicon.