Reducing test application time through interleaved scan
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero · PORTO Publications Open Repository TOrino (Politecnico di Torino) · 2002
This paper proposes a new method for reducing the test length for digital circuits by adopting an architecture derived from the popular scan approach. An evolutionary optimization algorithm is exploited to find the optimal solution. The proposed approach was tested on the ISCAS89 standard benchmarks and the experimental results show its effectiveness.