Progress and challenges in building evolvable devices
Adrian Stoica, Ricardo Salem Zebulum, Didier Keymeulen · 2002
This paper presents JPL progress in building evolution-oriented reconfigurable devices. It surveys the FPTA family, and presents details of the latest chip, FPTA2, an array of 64 reconfigurable cells that can implement mixed-signal functions, include programmable capacitors and resistors and integrate photodetectors as part of a built-in vision sensor. The chip was fabricated in 0.18 micron CMOS. The paper also discusses some of the challenges in building such chips, as well as lessons learned while evolving circuits.