Lane recognition system implemented by a full hardware design
Pin-Yang Kang, Yen‐Po Chen, Ming‐Jer Jeng · 2014
In order to get a right decision instead of human eye, machine vision becomes a popular issue especially in the application field of automotive. This design provides a high speed lane recognition based on Terasic DE2-70 FPGA platform which included 4.3” touch LCD and a 500 Megapixel CCD camera. With full hardware design, this system can easily reduce the image processing and recognition time. The system with a relatively high rate of successful recognition under the 160 Km/hr can be achieved.