Design and Evaluation of a Multiprocessor Architecture with Decentralized Control
Hsiao-Chen Chung, Chuan-lin Wu, James Rakes, P.J. Zievers, Yin-Kuan Lin · 1994
This paper presents design and evaluation of a decentralized control mechanism of a variable-topology (phase-reconfigurable) multiprocessor architecture. We design and implement an active crossbar communication processor(XCP) which encodes a set of communication instructions. The new interconnection network approach provides an apt phase-reconfiguration method. The new method is distributed in nature and does not require a global control bus that is a time consuming feature as verified in many existing systems. A conjugate-gradient algorithm for solving a linear system equations is used to perform evaluation and comparison.