Mapping method for dynamically reconfigurable architecture
Akira Kuroda, Mayuko Koezuka, Hidenori Matsuzaki, Takashi Yoshikawa, Shigehiro Asano · Asia and South Pacific Design Automation Conference · 2009
We present a mapping algorithm for our dynamically reconfigurable architecture suitable for stream applications such as H.264. Because our target architecture consists heterogeneously of four different configuration format units, it's difficult to apply the conventional algorithms. We propose a heuristic mapping algorithm enabling the mapping of generic dataflow graph onto this complex hardware automatically. We mapped five main functions of H.264 decoder onto our architecture and compared the results with those of manual mapping performed by an experienced engineer. The results show optimization of three of the five functions is equal to that in the case of the manual mapping.