Tradeoffs in processor/memory interfaces for superscalar processors
Thomas M. Conte · ACM SIGMICRO newsletter/SIGMICRO newsletter/SIGMICRO, TCMICRO newsletter · 1992
This paper addresses the relative merits of the three processor/memory interface schemes by constructing a fair comparison between the schemes. Six members of the SPEC89 benchmark set are used [4]. For each benchmark (where possible) a cache size is selected that achieves a fixed miss ratio. Miss ratios of 5% and 10% are used for the study. This effectively removes the fixed cache size problem and replaces it with fixed cache performance.