Test generation and three-state elements, buses, and bidirectionals
J.T. van der Linden, Mario Konijnenburg, A.J. van de Goor · 2002
Published work on stuck-at-fault test generation nearly exclusively considers circuits composed of only binary logic gates. Industrial designs commonly contain three-state elements, such as: buses and drivers, transmission gates, and bidirectional I/O. This paper presents extensions to state-of-the-art ATPG algorithms in order to handle these elements. A 25-valued signal model is used for test generation. Results demonstrate the effectiveness of the proposed extensions in the presence of various three-state elements, and show but a small performance degradation compared to the traditional 9-valued signal model for binary logic circuits.>