An FPGA configuration circuit based on JTAG
Huiguo Zhang, Yulan Tang, Zongguang Yu · 2009
An FPGA configuration circuit based on JTAG is designed. The configuration circuit has the JTAG architecture which is compatible with the IEEE standard 1149.1. Under the shift function of JTAG, a data chain for configuration is provided. The process of the configuration is controlled by three simple counters. Implemented with the CSMC 0.5 um technology, the configuration circuit has the area of 1.404 mm2, occupies the 3 percent of total FPGA area. Compared with the control scheme of complex state machine, this design is simple and has been used in an FPGA.