A 52-mW 8.29mm 2 19-mode LDPC decoder chip for Mobile WiMAX applications
Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Dixson Lin, An-Yeu Andy Wu · 2009
This paper presents a LDPC decoder chip supporting all 19 modes in Mobile WiMAX applications. An efficient IC design strategy is proposed to reduce 31.25% decoding latency, and enhance hardware utilization ratio from 50% to 75%. In addition, we propose a new early termination scheme that can dynamically adjust the iteration number. The multi-mode chip implemented in 8.29mm2 die area can be maximally measured at 83.3MHz with only 52mW power consumption.