Hardware-dependent software synthesis for many-core embedded systems
Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel D. Gajski · 2009
Abstract This paper presents synthesis of Hardware Depen-dent Software (HdS) for multicore and many-core designs using Embedded System Environment (ESE). ESE is a tool set, devel-oped at UC Irvine, for transaction level design of multicore em-bedded systems. HdS synthesis is a key component of ESE back-end design ow. We follow a design process that starts with an application model consisting of C processes communicating via abstract message passing channels. The application model is mapped to a platform net-list of SW and HW cores, buses and buffers. A high speed transaction level model (TLM) is generated to validate abstract communication between processes mapped to different cores. The TLM is further rened into a Pin-Cycle Ac-curate Model (PCAM) for board implementation. The PCAM in-cludes C code for all the HdS layers including routing, packeting, synchronization and bus transfer. The generated HdS methods provide a library of application level services to the C processes on individual SW cores. Therefore, the application developer does not need to write low level HdS for board implementation. Syn-thesis results for an multi-core MP3 decoder design, using ESE, show that the HdS is generated in order of seconds, compared to hours of manual coding. The quality of synthesized code is compa-rable to manually written code in terms of performance and code size. I.