An efficient CPLD technology mapping under the time constraint
Hi-Seok Kim, Jae‐Jin Kim, Chi-Ho Lin · 2002
In this paper, we proposed a new technology mapping algorithm for CPLD under a time constraint (TMCPLD). In our technology mapping algorithm, a given Boolean network generated a feasible cluster. The generated feasible cluster creates clusters with minimum area under the time constraint. A covered Boolean network is transformed to a Boolean equation. The transformed equations are reconstructed in order to fit the architecture of a selected target CPLD using collapsing and bin-packing. To demonstrate the efficiency of our approach, we applied our algorithm to MCNC benchmarks and compared the results with those of the existing algorithms. The experimental results show that our approach is better than any of the existing algorithms in the number of logic blocks.