Parallely cascaded heterogeneous perceptron applied to base-4 digital computations
C.-L.J. Hu · 2003
A heterogeneous perceptron circuit cascaded in a parallel manner is proposed here to implement the base-4 digital multiplication process. The design follows the universal mapping characteristic of a parallely cascaded heterogeneous perceptron system cascaded in a parallel fashion. This heterogeneous system allows one to use the base-4 digital computation much more efficiently than any conventional binary neural-network system. The origin of this heterogeneous system and a numerical design of the system are reported in detail.>