Optimization of Logic Use on Stereo Vision Algorithm Example
Pawel J. Rajda · Field-Programmable Custom Computing Machines · 2001
The paper describes the implementation of the stereovision algorithm in partially reconfigurable Xilinx FPGA devices (XC6200 and XCVirtex). By dividing the whole algorithm onto parts and using partial reconfiguration only the small amount of processing resources was needed to perform the implementation. Some comparison with other existing FPGA implementations is given.