Burstlogic: Design and Analysis of Logic Circuitry to Perform Arithmetic on Data in the Burst Format
Leon Clemens Tietz · Defense Technical Information Center (DTIC) · 1977
A family of Processors has been developed to perform arithmetic on data in the Burst Format. The common building block of these circuits is a simple finite state machine called the Perverted Adder (PA) which performs BURST addition. The interconnection of PAs in a tree formation with some additional circuitry produces a Burst multiplier or divider. A PA CPU has been constructed to demonstrate these PA designs. (Author)