State information-based solutions for sequential circuit diagnosis and testing
W.K. Fuchs, Vamsi Boppana · 1997
Several important problems in diagnosis and testing have effective solutions for combinational circuits but not for sequential circuits. The most important characteristic of sequential circuits that separates them from combinational circuits is state information. Thus, in this research, state space properties are studied and applied to solve problems in fault diagnosis, partial scan design, indistinguishability identification, diagnostic test generation and untestability identification. Simulation time required for fault diagnosis is reduced by developing an integrated approach to fault diagnosis. We achieve rapid fault location by storing precomputed information that is targeted at reducing the simulation costs at diagnosis time. The information stored captures the essential characteristics of simulation required to reduce the large run times. This represents a departure from previous techniques which have mainly stored primary output-based information. Partial scan design is improved by expressing and achieving specific test objectives. Test generation gives information on desired states while fault simulation is used to identify information on known reachable states. The required objectives are achieved with the help of a state transition model of scan, developed in this research, that models the effect of scan in terms of transitions introduced into the original state transition graph. Sequential indistinguishability is characterized by state space properties. This knowledge is used to derive conditions for the implicit identification of indistinguishability and for sequential collapsing for sequential circuits. Collapsing is used to demonstrate that specific classes of faults can be organized into disjoint partitions based on the indistinguishability relations between them. These results are used to develop a diagnostic test pattern generation (DATPG) algorithm that has the same order of complexity as that of detection-oriented test pattern generation (ATPG). Techniques for exploiting sequential indistinguishabilities to identify untestabilities are also developed. Identifying and understanding the capabilities of sequential untestability identification by practical ATPG algorithms is vital to areas such as ATPG-based optimization and ATPG-based verification. This research provides conditions based on the state properties of the good and the faulty machines involved to ensure that the behavior of the circuit in the presence of untestable faults, as identified by practical sequential ATPG algorithms, is not different from the good circuit. This helps alleviate problems faced with the use of such algorithms in applications where inaccuracies in the identified untestabilities are unacceptable.